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1

Influence of tester, test method, and device type on CDM ESD testing

Verhaege, K., Groeseneken, G.V., Maes, H.E., Egger, P., Gieser, H.

Journal:

IEEE Transactions on Components Packaging and Manufacturing Technology Part A

Year:

1995

Language:

english

File:

PDF, 1.11 MB

english, 1995

2

[ESD Assoc Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 - Orlando, FL, USA (28-30 Sept. 1999)] Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396) - Influence of gate length on ESD-performance for deep sub micron CMOS technology

Bock, K., Keppens, B., De Heyn, V., Groeseneken, G., Ching, L.Y., Naem, A.

Year:

1999

Language:

english

File:

PDF, 1.13 MB

english, 1999

3

Characterization and modeling of transient device behavior under CDM ESD stress

J. Willemen, A. Andreini, V. De Heyn, K. Esmark, M. Etherton, H. Gieser, G. Groeseneken, S. Mettler, E. Morena, N. Qu, W. Soppa, W. Stadler, R. Stella, W. Wilkening, H. Wolf, L. Zullino

Journal:

Journal of Electrostatics

Year:

2004

Language:

english

File:

PDF, 450 KB

english, 2004

4

Process-Dependent N/PBTI Characteristics of TiN Gate FinFETs

Jin Ju Kim, Moonju Cho, Pantisano, L., Ukjin Jung, Young Gon Lee, Chiarella, T., Togo, M., Horiguchi, N., Groeseneken, G., Byoung Hun Lee

Journal:

IEEE Electron Device Letters

Year:

2012

Language:

english

File:

PDF, 386 KB

english, 2012

5

Justifications for reducing HBM and MM ESD qualification test time

K. Verhaege, D. Robinson-Hahn, C. Russ, M. Farris, J. Scanlon, D. Lin, J. Veltri, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

1996

Language:

english

File:

PDF, 319 KB

english, 1996

6

A new degradation model and lifetime extrapolation technique for lightly doped drain nMOSFETs under hot-carrier degradation

R. Dreesen, K. Croes, J. Manca, W. De Ceuninck, L. De Schepper, A. Pergoot, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

2001

Language:

english

File:

PDF, 617 KB

english, 2001

7

Influence of gate length on ESD-performance for deep submicron CMOS technology

K. Bock, B. Keppens, V.De Heyn, G. Groeseneken, L.Y. Ching, A. Naem

Journal:

Microelectronics Reliability

Year:

2001

Language:

english

File:

PDF, 667 KB

english, 2001

8

A high resolution method for measuring hot carrier degradation in matched transistor pairs

R. Dreesen, W. De Ceuninck, L. De Schepper, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

1997

Language:

english

File:

PDF, 279 KB

english, 1997

9

Degradation and breakdown in thin oxide layers: mechanisms, models and reliability prediction

R. Degraeve, B. Kaczer, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

1999

Language:

english

File:

PDF, 288 KB

english, 1999

10

Non-uniform triggering of gg-nMOSt investigated by combined emission microscopy and transmission line pulsing

Christian Russ, Karlheinz Bock, Mahmoud Rasras, Ingrid De Wolf, Guido Groeseneken, Herman E Maes

Journal:

Microelectronics Reliability

Year:

1999

Language:

english

File:

PDF, 546 KB

english, 1999

11

Influence of well profile and gate length on the ESD performance of a fully silicided 0.25 μm CMOS technology

Bock, K., Russ, C., Badenes, G., Groeseneken, G., Deferm, L.

Journal:

IEEE Transactions on Components Packaging and Manufacturing Technology Part C

Year:

1998

Language:

english

File:

PDF, 272 KB

english, 1998

12

[IEEE Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005. - Grenoble, France (12-16 Sept. 2005)] Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005. - Characterization of dynamic SOA of power MOSFETs limited by electrothermal breakdown

Van den bosch, G., Wojciechowski, D., Elattari, B., Moens, P., Groeseneken, G.

Year:

2005

Language:

english

File:

PDF, 290 KB

english, 2005

13

[IEEE 2010 IEEE International Reliability Physics Symposium - Garden Grove (Anaheim), CA, USA (2010.05.2-2010.05.6)] 2010 IEEE International Reliability Physics Symposium - Improvements of NBTI reliability in SiGe p-FETs

Franco, J., Kaczer, B., Cho, M., Eneman, G., Groeseneken, G., Grasser, T.

Year:

2010

Language:

english

File:

PDF, 622 KB

english, 2010

14

Simulation study for the CDM ESD behaviour of the grounded-gate nmos

C. Russ, K. Verhaege, K. Bock, G. Groeseneken, H.E. Maes

Journal:

Microelectronics Reliability

Year:

1996

Language:

english

File:

PDF, 320 KB

english, 1996

15

ESD circuit model based protection network optimisation for extended-voltage NMOS drivers

V. Vassilev, V. Vashchenko, Ph. Jansen, G. Groeseneken, M. Terbeek

Journal:

Microelectronics Reliability

Year:

2005

Language:

english

File:

PDF, 546 KB

english, 2005

16

NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase

A. Shickova, B. Kaczer, A. Veloso, M. Aoulaiche, M. Houssa, H. Maes, G. Groeseneken, J.A. Kittl

Journal:

Microelectronics Reliability

Year:

2007

Language:

english

File:

PDF, 138 KB

english, 2007

17

Reliability screening of high-k dielectrics based on voltage ramp stress

A. Kerber, L. Pantisano, A. Veloso, G. Groeseneken, M. Kerber

Journal:

Microelectronics Reliability

Year:

2007

Language:

english

File:

PDF, 638 KB

english, 2007

18

A CMOS circuit for evaluating the NBTI over a wide frequency range

R. Fernández-García, B. Kaczer, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

2009

Language:

english

File:

PDF, 1.58 MB

english, 2009

19

ESD–RF co-design methodology for the state of the art RF-CMOS blocks

V. Vassilev, S. Thijs, P.L. Segura, P. Wambacq, P. Leroux, G. Groeseneken, M.I. Natarajan, H.E. Maes, M. Steyaert

Journal:

Microelectronics Reliability

Year:

2005

Language:

english

File:

PDF, 548 KB

english, 2005

20

FinFET and MOSFET preliminary comparison of gate oxide reliability

R. Fernández, R. Rodríguez, M. Nafría, X. Aymerich, B. Kaczer, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

2006

Language:

english

File:

PDF, 286 KB

english, 2006

21

Analysis of Iddq failures by spectral photon emission microscopy

M. Rams, I. De Wolf, H. Bender, G. Groeseneken, H.E. Maes, S. Vanhaeverbeke, P. De Pauw

Journal:

Microelectronics Reliability

Year:

1998

Language:

english

File:

PDF, 500 KB

english, 1998

22

ESD protection methodology for deep-sub-micron CMOS

K. Bock, G. Groeseneken, H.E. Maes

Journal:

Microelectronics Reliability

Year:

1998

Language:

english

File:

PDF, 1.16 MB

english, 1998

23

Significance of the failure criterion on transmission line pulse testing

B. Keppens, V. De Heyn, M. Natarajan Iyer, V. Vassilev, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

2002

Language:

english

File:

PDF, 512 KB

english, 2002

24

Basics and applications of charge pumping in submicron MOSFETs© 1997 IEEE. Reprinted, with permission, from Proc. 1997 21st International Conference on Microelectronics, Nis, Yugoslavia, 14–17 September 1997, Vol. 2, pp. 581–589.

Guido Groeseneken, Herman E Maes

Journal:

Microelectronics Reliability

Year:

1998

Language:

english

File:

PDF, 479 KB

english, 1998

25

Modelling hot-carrier degradation of LDD NMOSFETs by using a high-resolution measurement technique

R. Dreesen, K. Croes, J. Manca, W. De Ceuninck, L. De Schepper, A. Pergoot, G. Groeseneken

Journal:

Microelectronics Reliability

Year:

1999

Language:

english

File:

PDF, 437 KB

english, 1999

26

Ultra-thin oxide reliability: searching for the thickness scaling limit

R Degraeve, B Kaczer, G Groeseneken

Journal:

Microelectronics Reliability

Year:

2000

Language:

english

File:

PDF, 327 KB

english, 2000

27

Impact of process and geometrical parameters on the electrical characteristics of vertical nanowire silicon n-TFETs

A. Vandooren, D. Leonelli, R. Rooyackers, K. Arstila, G. Groeseneken, C. Huyghebaert

Journal:

Solid-State Electronics

Year:

2012

Language:

english

File:

PDF, 861 KB

english, 2012

28

Analysis of the charge pumping technique and its application for the evaluation of MOSFET degradation

Heremans, P., Witters, J., Groeseneken, G., Maes, H.E.

Journal:

IEEE Transactions on Electron Devices

Year:

1989

Language:

english

File:

PDF, 1.76 MB

english, 1989

29

Temperature dependence of the channel hot-carrier degradation of n-channel MOSFET's

Heremans, P., Van den Bosch, G., Bellens, R., Groeseneken, G., Maes, H.E.

Journal:

IEEE Transactions on Electron Devices

Year:

1990

Language:

english

File:

PDF, 1.42 MB

english, 1990

30

Grounded-gate nMOS transistor behavior under CDM ESD stress conditions

Verhaege, K., Russ, C., Luchies, J.-M., Groeseneken, G., Kuper, F.G.

Journal:

IEEE Transactions on Electron Devices

Year:

1997

Language:

english

File:

PDF, 196 KB

english, 1997

31

Hot-carrier degradation phenomena in lateral and vertical DMOS transistors

Moens, P., Van den bosch, G., Groeseneken, G.

Journal:

IEEE Transactions on Electron Devices

Year:

2004

Language:

english

File:

PDF, 471 KB

english, 2004

32

MOSFET ESD Breakdown Modeling and Parameter Extraction in Advanced CMOS Technologies

Vassilev, V., Lorenzini, M., Groeseneken, G.

Journal:

IEEE Transactions on Electron Devices

Year:

2006

Language:

english

File:

PDF, 342 KB

english, 2006

33

Characterization and Optimization of Sub-32-nm FinFET Devices for ESD Applications

Thijs, S., Tremouilles, D., Russ, C., Griffoni, A., Collaert, N., Rooyackers, R., Linten, D., Scholz, M., Duvvury, C., Gossner, H., Jurczak, M., Groeseneken, G.

Journal:

IEEE Transactions on Electron Devices

Year:

2008

Language:

english

File:

PDF, 482 KB

english, 2008

34

Off-State Degradation of High-Voltage-Tolerant nLDMOS-SCR ESD Devices

Griffoni, A., Shih-Hung Chen, Thijs, S., Kaczer, B., Franco, J., Linten, D., De Keersgieter, A., Groeseneken, G.

Journal:

IEEE Transactions on Electron Devices

Year:

2011

Language:

english

File:

PDF, 1.49 MB

english, 2011

35

A reliable approach to charge-pumping measurements in MOS transistors

Groeseneken, G., Maes, H.E., Beltran, N., De Keersmaecker, R.F.

Journal:

IEEE Transactions on Electron Devices

Year:

1984

Language:

english

File:

PDF, 1.19 MB

english, 1984

36

Channel Hot-Carrier Degradation in Short-Channel Transistors With High- $k$/Metal Gate Stacks

Amat, E., Kauerauf, T., Degraeve, R., De Keersgieter, A., Rodriguez, R., Nafria, M., Aymerich, X., Groeseneken, G.

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2009

Language:

english

File:

PDF, 287 KB

english, 2009

37

[ESD Assoc 18th Annual Electrical Overstress/Electrostatic Discharge Symposium - Orlando, FL, USA (10-12 Sept. 1996)] Proceedings Electrical Overstress/Electrostatic Discharge Symposium - Recommendations to further improvements of HBM ESD component level test specifications

Verhaege, K., Russ, C., Robinson-Hahn, D., Farris, M., Scanlon, J., Lin, D., Veltri, J., Groeseneken, G.

Year:

1996

Language:

english

File:

PDF, 1.40 MB

english, 1996

38

[IEEE 2008 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2008.12.15-2008.12.17)] 2008 IEEE International Electron Devices Meeting - Impact of Strain on ESD Robustness of FinFET Devices

Griffoni, A., Thijs, S., Russ, C., Tremouilles, D., Scholz, M., Linten, D., Collaert, N., Rooyackers, R., Duvvury, C., Gossner, H., Meneghesso, G., Groeseneken, G.

Year:

2008

Language:

english

File:

PDF, 378 KB

english, 2008

39

[IEEE 2014 IEEE International Reliability Physics Symposium (IRPS) - Waikoloa, HI, USA (2014.6.1-2014.6.5)] 2014 IEEE International Reliability Physics Symposium - Improvement on CDM ESD robustness of high-voltage tolerant nLDMOS SCR devices by using differential doped gate

Chen, S.-H., Linten, D., Scholz, M., Hellings, G., Boschke, R., Groeseneken, G., Huang, Y.-C., Ker, M.-D.

Year:

2014

Language:

english

File:

PDF, 350 KB

english, 2014

40

[IEEE 2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits - singapore (2008.07.7-2008.07.11)] 2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits - Review of reliability issues in high-k/metal gate stacks

Degraeve, R., Aoulaiche, M., Kaczer, B., Roussel, Ph., Kauerauf, T., Sahhaf, S., Groeseneken, G.

Year:

2008

Language:

english

File:

PDF, 360 KB

english, 2008

41

[IEEE 2004 Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) - Grapevine, TX, USA (2004.09.19-2004.09.23)] 2004 Electrical Overstress/Electrostatic Discharge Symposium - Advanced modelling and parameter extraction of the MOSFET ESD breakdown triggering in the 90nm CMOS node technologies

Vassilev, V., Lorenzini, M., Jansen, Ph., Groeseneken, G., Thijs, S., Natarajan, M. I., Steyaert, M., Maes, H. E.

Year:

2004

Language:

english

File:

PDF, 1.05 MB

english, 2004

42

[IEEE Technology (ICICDT) - Grenoble, France (2010.06.2-2010.06.4)] 2010 IEEE International Conference on Integrated Circuit Design and Technology - Advanced ESD power clamp design for SOI FinFET CMOS technology

Thijs, Steven, Tremouil, David, Tremouilles, David, Linten, Dimitri, Iyer, Natarajan Mahadeva, Griffoni, Alessio, Groeseneken, Guido

Year:

2010

Language:

english

File:

PDF, 112 KB

english, 2010

43

[IEEE 2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits - Bangalore, India (2007.07.11-2007.07.13)] 2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits - ESD protection for sub-45 nm MugFET technology

Natarajan, M.I., Thijs, S., Tremouilles, D., Linten, D., Collaert, N., Jurczak, M., Groeseneken, G.

Year:

2007

Language:

english

File:

PDF, 3.61 MB

english, 2007

44

[IEEE 2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits - Bangalore, India (2007.07.11-2007.07.13)] 2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits - Proof-of-Concept Structure for Investigation of Successive Soft Gate Oxide Breakdowns in Two Dimensions

Kaczer, B., Fernandez, R., Nackaert, A., Chiarella, T., Groeseneken, G.

Year:

2007

Language:

english

File:

PDF, 3.88 MB

english, 2007

45

[IEEE 2013 IEEE International Reliability Physics Symposium (IRPS) - Anaheim, CA (2013.4.14-2013.4.18)] 2013 IEEE International Reliability Physics Symposium (IRPS) - ESD in FinFET technologies: Past learning and emerging challenges

Linten, D., Hellings, G., Shih-Hung Chen,, Groeseneken, G.

Year:

2013

Language:

english

File:

PDF, 702 KB

english, 2013

46

[IEEE 2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) - Anaheim, CA, USA (2007.09.16-2007.09.21)] 2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) - Understanding the optimization of sub-45nm FinFET devices for ESD applications

Tremouilles, D., Thijs, S., Russ, C., Schneider, J., Duvvury, C., Collaert, N., Linten, D., Scholz, M., Jurczak, M., Gossner, H., Groeseneken, G.

Year:

2007

Language:

english

File:

PDF, 1001 KB

english, 2007

47

Gate Voltage Influence on the Channel Hot-Carrier Degradation of High-$k$ -Based Devices

Amat, Esteve, Kauerauf, Thomas, Degraeve, Robin, Rodriguez, Rosana, Nafria, Montserrat, Aymerich, Xavier, Groeseneken, Guido

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2011

Language:

english

File:

PDF, 363 KB

english, 2011

48

[IEEE 2010 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2010.12.6-2010.12.8)] 2010 International Electron Devices Meeting - Charged device model (CDM) ESD challenges for laterally diffused nMOS (nLDMOS) silicon controlled rectifier (SCR) devices for high-voltage applications in standard low-voltage CMOS technology

Griffoni, A., Chen, S.-H., Thijs, S., Linten, D., Scholz, M., Groeseneken, G.

Year:

2010

Language:

english

File:

PDF, 1.16 MB

english, 2010

49

[IEEE 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD) - Hong Kong, China (2015.5.10-2015.5.14)] 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD) - The impact of the gate dielectric quality in developing Au-free D-mode and E-mode recessed gate AlGaN/GaN transistors on a 200mm Si substrate

Wu, Tian-Li, Marcon, Denis, De Jaeger, Brice, Van Hove, Marleen, Bakeroot, Benoit, Lin, Dennis, Stoffels, Steve, Kang, Xuanwu, Roelofs, Robin, Groeseneken, Guido, Decoutere, Stefaan

Year:

2015

Language:

english

File:

PDF, 620 KB

english, 2015

50

Performance Optimization of Au-Free Lateral AlGaN/GaN Schottky Barrier Diode With Gated Edge Termination on 200-mm Silicon Substrate

Hu, Jie, Stoffels, Steve, Lenci, Silvia, Bakeroot, Benoit, De Jaeger, Brice, Van Hove, Marleen, Ronchi, Nicolo, Venegas, Rafael, Liang, Hu, Zhao, Ming, Groeseneken, Guido, Decoutere, Stefaan

Journal:

IEEE Transactions on Electron Devices

Year:

2016

Language:

english

File:

PDF, 5.23 MB

english, 2016

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